Starting Active-HDL as the Default Simulator in Intel® Quartus® Prime

Introduction

Active-HDL simulator can be run directly from Intel® Quartus® Prime software using NativeLink feature. This application note explains how to use the NativeLink feature in Intel® Quartus® Prime. This application note has been verified on Active-HDL 13.0 and Quartus® Prime 21.1. This interface allows users to run mixed VHDL, Verilog and System Verilog ("design" constructs) simulation using Active-HDL as the default simulator.

Configuring Active-HDL in Quartus® Prime

Figure 2: EDA Tool Settings

NativeLink Settings

Go to Assignment | EDA Tool setting. Click on Simulation under EDA Tool Settings. This setting is just below the EDA Tool Settings. NativeLink settings are located at the bottom of Simulation category on the right hand side-as shown in Figure 2. There are three NativeLink settings for selecting the test bench for the simulation.

Figure 3: EDA Tool Settings

Now select the option of your choice from NativeLink Settings. For Running the Simulation, please refer to the next section.

Running the Simulation

To launch Active-HDL from Quartus® Prime, click on Tools | Run EDA Simulation Tool option. Active-HDL starts and creates the project and adds necessary files to the project. It also creates and compiles the necessary Intel® libraries. It adds signals to the waveform and runs simulation after that. You will receive the end of the simulation message in the console when simulation is done as shown in Figure 3.

Figure 4: Running Simulation

Figure 5: Running Simulation



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