Microsemi® Language-Neutral Libraries

Category : Simulation/Verification

This option enables Aldec customers with VHDL-only license to simulate the Microsemi IP without purchasing a separate Verilog license (which is required due to embedded Verilog/SystemVerilog). In order to leverage this option, VHDL-only customers must request Microsemi® Language-Neutral Libraries from Aldec at www.aldec.com/downloads

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