The HES Proto-AXI™ software package, when combined with our HES™ prototyping boards, provides an efficient and robust environment for rapid design prototyping and/or algorithm accelerator development and bring-up.
It contains an AMBA AXI-based module and a corresponding software API, serving as a Host-to-FPGA and an FPGA-to-Memory bridge for FPGA-based prototyping or High-Performance Computing (HPC) applications. Reusable design resources - such as sample designs, board definitions, preconfigured peripheral IP blocks and constraint templates - increase your productivity and shorten development times. In addition, HES board control tools can be used to check the board status and configure on-board FPGA and PLL parts.
A robust and reusable test environment can be developed using a programmable test controller, implemented as a software application running on a host. The availability of the Host-to-FPGA bridge significantly reduces the development time of your test environment. Also, to accommodate a broad range of applications, we can provide the HES Proto-AXI Host Bridge module in one of two types; as either a Workstation Host or an Embedded Host.
This is a bridge from Workstation/PC to a memory-mapped AXI device in FPGA. The physical connection is via PCI Express. We provide the HES Proto-AXI Bridge IP on the (HES) hardware side and a PCI Express driver with C/C++ API and Python wrapper on the Workstation/PC Host side; for the rapid development of test controller software.
This is a bridge from a Xilinx Zynq chip – a 7000 or MPSoC device with an ARM Cortex processor and embedded Linux – to a memory-mapped AXI device in another FPGA on the same HES board. The on-board physical connection is via Multi Gigabit Transceivers (MGT). We provide the hardware IP modules for the HES Proto-AXI Bridge and the MGT-to-AXI interface, plus the full software stack (including C/C++ API) for the rapid development of test controller embedded applications.
This is an extended variant of HES Proto-AXI. It integrates the host bridge function with full AXI Interconnect, which incorporates multiple AXI slave and master ports for connecting several design modules or accelerator kernels. It also contains external memory controllers providing access to on-board DDR, RLD, or QDR memories. Complementing the base functionality of the interconnect, the HES Proto-AXI provides an address re-mapper, interrupt support and GPIO ports. The interconnect mode can be used with both workstation and embedded host types.