The HES-XCVU9P-ZU7EV is designed for High-Performance Computing (HPC) applications which require immense digital signal processing. The board features a unique integration of a ZU7EV Zynq® UltraScale+™ MPSoC and a VU9P Virtex® UltraScale+™ FPGA. This heterogeneous computing platform leverages a Quad-core ARM® Cortex-A53, Dual-core ARM® Cortex-R5 real-time processing units, an ARM® Mali-400 MP2 GPU, integrated H.264/H.265 video codec, and UltraScale+™ programmable logic in a 16nm FinFET node.
Available onboard external memory resources include three (3) DDR4 SODIMM slots and two (2) modules of 576Mb RLDRAM-3 (1Gb total). On-chip memory for the Zynq® programmable logic includes 11Mb of Block RAM and 27Mb of UltraRAM. On-chip memory for the VU9P programmable logic includes 75.9Mb of Block RAM and 270Mb of UltraRAM.
Resources | VU9P Virtex UltraScale+™ FPGA | ZU7EV Zynq UltraScale+™ MPSoC |
Logic Cells/LUTs (K) |
2586 | 504 |
Total Block RAM (Mb) |
75.9 | 11 |
UltraRAM (Mb) |
270 | 27 |
DSP Slices |
6840 | 1728 |
Transceivers |
76 GTY 32.75 Gb/s | 20 GTH 16.3Gb/s |
I/O |
702 HP | 214 PS, 312 HP, 48 HD |
Clocking is provided by oscillators, PLLs, and MMCX connectors. Dedicated oscillators are connected directly to the FPGA devices as well as onboard PLLs. The onboard PLLs provide any-frequency common clocks for both FPGA devices and dedicated any-frequency clocks to the VU9P to accommodate a variety of applications. Clocking can also be provided through the FMC+ connector through thirteen (13) differential clock inputs to the VU9P.
The board is connected to a workstation or server through the board’s PCIe x16 edge connector. A wide variety of interfaces are available to be connected to the FPGA devices.
Interfaces | |
VU9P Virtex® UltraScale+™ FPGA | ZU7EV Zynq® UltraScale+™ MPSoC (connected to the ARM® processing system) |
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Aldec provides the Hes.Asic.Proto software package with necessary drivers and utilities for programming and communication with the board. For quick bring-up of host connection, Aldec provides ready to use image of the embedded Linux for ZU7EV device and HES Proto-AXI solution, which consists of a bridge module IP with AMBA AXI interface and accompanying PCI Express HES driver with C++ API for Linux and Windows PC allowing to transfer data directly to the AMBA AXI local bus behind the bridge. Power is supplied by a standard 6-pin PCIe power cable.
FPGA & Capacity
Flexible Clocking
Memory Resources
Interfaces & Hosting
Miscellaneous
Software Support