Events Schedule

Recorded Events
Date Event Type Location Action
Mar 21, 2024 Turbocharge your FPGA Simulation Workflows:

Part 1 - High-Performance RTL Simulation Workflow with Vivado and Active-HDL (EU)
Webinar Online Register
Mar 21, 2024 Turbocharge your FPGA Simulation Workflows:

Part 1 - High-Performance RTL Simulation Workflow with Vivado and Active-HDL (US)
Webinar Online Register
Mar 27, 2024 Let's challenge UVM! Webinar Tokyo, Japan Register
Mar 28, 2024 Turbocharge your FPGA Simulation Workflows:

Part 2 - High-Performance RTL Simulation Workflow with Quartus and Active-HDL (US)
Webinar Online Register
Mar 28, 2024 Turbocharge your FPGA Simulation Workflows:

Part 2 - High-Performance RTL Simulation Workflow with Quartus and Active-HDL (EU)
Webinar Online Register
Apr 04, 2024 Turbocharge your FPGA Simulation Workflows:

Part 3 - High-Performance RTL Simulation Workflow with Libero and Active-HDL (US)
Webinar Online Register
Apr 04, 2024 Turbocharge your FPGA Simulation Workflows:

Part 3 - High-Performance RTL Simulation Workflow with Libero and Active-HDL (EU)
Webinar Online Register
Apr 11, 2024 Making a Structured VHDL Testbench – A Demo for Beginners (US) Webinar Online Register
Apr 11, 2024 Making a Structured VHDL Testbench – A Demo for Beginners (EU) Webinar Online Register
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