Santa Clara, CA – October 23, 2017 – Aldec, Inc., unveils the newest addition to the TySOM product line, TySOM-3-ZU7EV, based on the most powerful Xilinx® Zynq® UltraScale+ MPSoC, at ARM TechCon to be held on October 24-26, 2017, in Santa Clara, California.
The latest TySOM prototyping board serves embedded designers who require a high-performance configurable SoC in a small form-factor for embedded vision applications such as ADAS, surveillance and multimedia. The TySOM-3-ZU7EV features Quad ARM® Cortex-A53, Dual ARM Cortex-R5, UltraScale+ PL with Video Codec H.265/H.264, HDMI IN/OUT, 256MB NAND Flash, 4x USB 3.0, 2x FMC connector, QSFP+, Wi-Fi and Bluetooth.
The TySOM product line includes main Zynq boards, FMC daughter boards, advanced reference designs, tutorials and custom Linux that supports the Yocto Project (open source collaboration for creating custom Linux-based system). Aldec is a supporting organization and participant of the Yocto Project.
Aldec Demonstrations @ Booth#727:
- ADAS Demos/Reference designs based on TySOM-2-7Z045 + TySOM-2-FMC-ADAS
- Face and Drowsiness Detection - based on Pixel Intensity Comparison-based Object detection (PICO) framework. The driver's face/movement is detected, and eye blinking is monitored for drowsiness detection. In order to achieve the goal of 25 fps processing performance, the pixel-level computations are off-loaded to FPGA part of Zynq device using Xilinx SDSoC™ tool.
- Smart Rear-View Camera - utilizes an ultrasonic sensor for back-up parking assistance with augmented view. Based on the sensor measured value, the camera view is augmented with additional graphical elements such as distance value, warning sign and 3-level safety area using OpenCV library functions. The sensor fusion is done in the ARM core and augmented view is done in the ARM core + PWM controller in FPGA. The overall system performance is 30fps.
- IIoT Edge Processing uARM Robot Control based on TySOM-1-7Z030 - shows a robotic arm as an IIoT actuator controlled from TySOM board, performing pick & place operation. The uARM is additionally equipped with USB camera for objects recognition so that the robot can recognize the objects and sort them according to the recognized pattern.
- HW/SW Co-Simulation Solution based on QEMU and Riviera-PRO - Zynq system integration and simulation of FPGA custom IPs with open-source QEMU is now simplified with the addition of Aldec QEMU Bridge that connects QEMU and Riviera-PRO. The QEMU Bridge converts SystemC TLM transactions to AXI and vice versa providing a fast interface for HW/SW co-simulation. Such a solution helps the hardware and software teams to work together locate, identify, and fix bugs at an earlier stage in the development process.
See Aldec’s Verification Spectrum in action:
- Simulation- Advanced Mixed-Language Simulator with UVM Support
- DRC/CDCAnalysis- Single platform for Design Rule Checking (DRC) and Clock Domain Crossing (CDC) verification methodologies, with SystemVerilog design rules
- Emulation- Hardware-assisted co-emulation with QEMU, booting LINUX OS and running image filtering application
- Physical Prototyping– Multi-FPGA design partitioning technology
Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Embedded, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com