Henderson, NV – June 11, 2013 – Aldec, Inc., a pioneer in mixed-language simulation and advanced design tools for FPGA and ASIC devices, is offering the most popular Technical Sessions from this year’s Design Automation Conference online.
DO-254 Requirements Traceability
Date: Thursday, June 20, 2013
EU: 3:00 PM - 4:00 PM CEST Learn more
US: 11:00 AM - 12:00 PM PDT Learn More
Accelerate DSP Design Development: Tailored Flows
Date: Thursday, July 25, 2013
US Time: 11:00 AM - 12:00 PM PDT Learn more
CyberWorkBench: C-based High Level Synthesis and Verification
Date: Thursday, September 12, 2013
EU: 3:00 PM - 4:00 PM CEST Learn more
US: 11:00 AM - 12:00 PM PDT Learn more
Hybrid SoC Verification and Validation Platform for Hardware and Software Teams
Date: Thursday, September 26, 2013
EU Time: 3:00 PM - 4:00 PM CEST Learn more
US Time: 11:00 AM - 12:00 PM PDT Learn more
About Aldec
Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com
Aldec is a registered trademark of Aldec, Inc. All other trademarks or registered trademarks are property of their respective owners.
Media Contact: | Christina Toole, Aldec, Inc. +1.702.990.4400 christinat@aldec.com |