Henderson, NV – September 17, 2012 – Aldec, Inc., today announces the immediate availability of HES-7, a scalable ASIC prototype system that lowers the cost of today’s ASIC prototype process. HES-7 takes advantage of the Xilinx® Virtex-7 2000T 3D IC, which enables design capacity up to 24 million ASIC gates on a single HES-7 board. HES-7 utilizes a non-proprietary high-speed backplane connector that enables easy expansion of custom daughter boards or can enable up to four (4) HES-7 boards to interconnect - which provides design capacity up to 96 million ASIC gates.
“Today’s SoC/ASIC prototype teams are using off-the-shelf prototype boards that utilize large numbers of low density FPGAs. This makes implementing the SoC/ASIC design a painful process that requires more time-consuming design partitioning and added tool expense”, said Zibi Zalewski, Hardware Division General Manager at Aldec, Inc., “Using a dual chip HES-7 prototyping solution from Aldec together with Xilinx’s industry leading Virtex-7 2000T devices reduces the design implementation effort and lowers the tool expense when supporting multi-million gate SoC designs.”
“The HES-7 product fully leverages the power of our Virtex-7 2000T devices and our Vivado™ Design Suite, which together offer a strong combination of technology that accelerates time to validation and drives down the cost of the ASIC prototype process,” said Kirk Saban, Sr. Product Line Manager, Virtex-7 Xilinx, Inc.
To illustrate how HES-7, with fewer and higher density FPGAs, improves the ASIC prototype process, Aldec and Xilinx offer the co-authored technical article, HES-7 ASIC Prototyping.
HES-7 provides SoC/ASIC hardware verification and software validation teams with a proven quality, FPGA-based, ASIC prototyping solution backed with an industry leading 1 year limited warranty.
HES-7 is available today, with pricing that starts at $19,995.00. HES-7 is sold based on product configurations ranging from 4-96 million ASIC gates
Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, Design Rule Checking, IP Cores, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com
Aldec is a registered trademark of Aldec, Inc. All other trademarks or registered trademarks are property of their respective owners.
|Media Contact:||Christina Toole,