MATLAB®/Simulink® Interface

Programmable logic devices are continuing to be key components of high performance digital signal processing (DSP) systems. Aldec's offers two separate co-simulation interfaces for either Matlab or Simulink that integrates MathWorks' intuitive language and technical computing environment with Aldec's HDL-based simulation environments for FPGA and ASIC designs.

Simulink Co-Simulation

The Simulink Interface option is built-into Active-HDL and Riviera-PRO (no additional purchase is required from MathWorks) and provides the integration of The MathWorks' simulation tools with Aldec's HDL-based simulation environment. It enables co-simulation of mathematical and a hardware component of system-level design, and gives flexibility of successive replacement of mathematical models describing the system with their target HDL equivalents. The interface allows you to co-simulate functional blocks described by using mathematical formulas and VHDL entities, Verilog modules, and EDIF cells that are used as black-boxes during the verification process performed within the Simulink environment.

MATLAB Co-Simulation

The MATLAB interface option is built-into Active-HDL and Riviera-PRO (no additional purchase required from MathWorks) and enables the integration of The MathWorks' intuitive language and a technical computing environment - MATLAB with Aldec's HDL-based simulation environment for FPGA and ASIC designs. The interface simplifies the verification of hardware designs and provides robust visualization and analysis tools, and extends HDL testbenches with MATLAB language in order to create complex stimuli, perform UUT data analysis, or visualize simulated data as clearly as possible.