Today it is common for a part of the project to be designed by one team,  manufactured by another and assembled by a third. Documentation is a formal and precise way of communicating information about the design across the teams. It allows you to understand and visualize an unfamiliar design in a significantly shorter time. Powerful documentation tools built into Active-HDL by ALDEC allow you to create a textual or graphical representation of your workspace or design in HTML or PDF format. All design elements such as design files, waveforms, block diagrams and attached documents can be exported to HTML or PDF documents which can be controlled by various options in the wizard. The resulting documents always preserve the hierarchy of the design which provides easy navigation in complex designs. Export to vector graphics capability maintains the high resolution of schematic files in the generated document.

• Design Creation
  • Schematic / Block Diagram Editor
  • Code2Graphics
  • HDL Text Editor
  • Basic HDL Text Editor
  • State Machine Editor
  • FPGA Project Management
  • IP Core Generator
  • Testbench Generation
  • Documentation (HTML/PDF)
• Verification
  • Phase-Based Linting (PBL)
  • OVM and UVM Support
  • VHDL Simulation
  • FPGA Primitive Support
  • Verilog Simulation
  • SystemC
  • SystemVerilog
  • Assertions (PSL, SVA and OVA)
  • Verilog Simulation Optimization
  • Acceleration/Emulation
  • VHDL Simulation Optimization
  • Prototyping
  • Coverage Tools
  • Design Rule Checker
• Specialty Solutions
  • DO-254 In-Hardware Simulation
  • Code Coverage DO-254 Tool Assessment and Qualification
  • DO-254 HDL Design Rules
  • MATLAB/Simulink Co-Simulation
  • Verification IP
  • HDL Regression Manager
  • NIOS II Co-Verification
  • ARM Co-Verification
  • Actel RTAX/RTSX Prototyping
  • Actel RTSX Prototyping
  • EDIF Netlist Conversion