Aldec - Innovation Builds Leaders
2260 Corporate Circle · Henderson, NV 89074 · USA
Tel: +1-800-487-8743 · Fax: +1-702-990-4414 · E-mail: sales@aldec.com
 

Webinars

Europe - Design Rule Checking Tools: a Key to Avoiding ASIC Re-spins.
First Name:
Last Name:
Company:
Address:
City:
State/Province (US/Canada):
State (other countries):
Zip:
Country:
Phone:
Fax:
Email:
What FPGAs interest you?:



Which HDL's interest you?:



Are you interested in any specialty solutions:



When do you plan to purchase Design/Verification tools?:
How did you hear about Aldec?:
Build Information
  • All Platforms
  • 12/17/2008
  • Europe - Design Rule Checking Tools - a Key to Avoiding ASIC Re-spins.
  • Webinar
Instructions

Date:  Wednesday, December 17, 2008
Time:  3:00 pm – 4:00 pm Central European Time

Abstract

Design rule checking software detects a wide variety of design issues, such as poor coding styles, improper clock and reset management, synthesis problems, poor testability, etc. Recording and detailed analysis of detected issues is facilitated by variety of debugging tools. Implementing corrections suggested by the checking tools leads to faster delivery of better quality ASIC design. This webinar explores the advantages of Design Rule Checking Software with practical live demonstrations of Aldec ALINTâ„¢ solution.

Copyright © Aldec, Inc.
www.aldec.com